/*
 * I/O port addresses of the PIT registers.
 */
#define	PIT_CNTR0	0x40	/* timer 0 counter port */
#define	PIT_CNTR1	0x41	/* timer 1 counter port */
#define	PIT_CNTR2	0x42	/* timer 2 counter port */
#define	PIT_CONTROL	0x43	/* timer control port */
#define 	SET_CNT1	0x36
/*
 * Control register bit definitions
 */
#define	PIT_SEL0	0x00	/* select counter 0 */
#define	PIT_SEL1	0x40	/* select counter 1 */
#define	PIT_SEL2	0x80	/* select counter 2 */
#define	PIT_INTTC	0x00	/* mode 0, intr on terminal cnt */
#define	PIT_ONESHOT	0x02	/* mode 1, one shot */
#define	PIT_RATEGEN	0x04	/* mode 2, rate generator */
#define	PIT_SQWAVE	0x06	/* mode 3, square wave */
#define	PIT_SWSTROBE	0x08	/* mode 4, s/w triggered strobe */
#define	PIT_HWSTROBE	0x0a	/* mode 5, h/w triggered strobe */
#define	PIT_LATCH	0x00	/* latch counter for reading */
#define	PIT_LSB		0x10	/* r/w counter LSB */
#define	PIT_MSB		0x20	/* r/w counter MSB */
#define	PIT_16BIT	0x30	/* r/w counter 16 bits, LSB first */
#define	PIT_BCD		0x01	/* count in BCD */

/*
 * Clock speed at which the standard interval timers in the PC are driven,
 * in hertz (ticks per second) and nanoseconds per tick, respectively.
 */
#define PIT_HZ		1193182
#define PIT_NS		(1000000000 / PIT_HZ)


/*
 * Macros to read and set individual PIT timers.
 */
#define pit_read(n)							\
	({	int value;						\
		outb(PIT_CONTROL, PIT_SEL##n);				\
		value = inb(PIT_CNTR##n) & 0xff;			\
		value |= (inb(PIT_CNTR##n) & 0xff) << 8;		\
		value;							\
	})
#define pit_set(n, mode, value)						\
	({	outb(PIT_CONTROL, PIT_SEL##n | PIT_16BIT | (mode));	\
		outb(PIT_CNTR##n, (value) & 0xff);			\
		outb(PIT_CNTR##n, ((value) >> 8) & 0xff);		\
	})

/*
 * Initialize timer 0 in the standard way as a rate generator
 * to act as a system clock operating at the specified frequency.
 */
#define pit_init(hz)	pit_set(0, PIT_RATEGEN, PIT_HZ / (hz))

